FPGA Implementation of Network Printer
(An Overview)

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Introduction

This project was done for the "Computer Science and Engineering Department" of IIT Bombay by Anand Vishwanathan, Krishnakumar Nair, Javed Ansari and Krishndas Bhat, Final Year students of B.E. (Electronics) at Fr. Conceicao Rodrigues College of Engineering under the guidance of Dr. S.S.S.P.Rao, Professor, VLSI Design Center.

The objective of the project was to develop a FPGA that will implement all the functions of a Network Interface Controller. This Controller will eventually be built on a print server card for Ethernet Local Area Network. The print server card will be dedicated to a self-contained unit having all the required hardware and software features required to implement CSMA/CD (Carrier Sense Multiple Access with Collision Detection) Protocol completely. It will also allow users to share the printer without any additional hardware backup such as the use of a file server. It will have sufficient on board buffer RAM to receive the packets. It should be able to provide data to the printer as and when required.

fig: Hardware Print Server

fig. Interfacing of Hardware Print Server to LAN

The most important component of this project is the Network Controller. This project required us to use a generic Controller providing the very basic functions and eliminating the complex ones such as multicast addressing, etc. Further, once operational, one must be able to provide added features easily. For these reasons, we have designed our own controller using VHDL, i.e. VHSIC (Very High-Speed Integrated Circuit) Hardware Descriptive Language. It is a language that can be used to describe the behaviour, structure and implementation of electronic systems.

Field Programmable Gate Arrays (FPGAs)

A generic description of an FPGA is a programmable device with an internal array of logic blocks, surrounded by a ring of programmable input/output blocks, connected together via programmable interconnect. The general diagram of a FPGA is shown below:

fig.: FPGA Architecture

The Design, after simulation will be implemented using FPGA (Field Programmable Gate Array) devices. These are pre-wired circuits that are programmed by the users (on the field and after chip fabrication) to perform the desired functions. Today, there are several FPGA vendors and their circuits vary widely in their programming technology and implementation style.

The FPGA has three major configurable elements: configurable logic blocks (CLBs), input/output blocks, and interconnects. The CLBs provide the functional elements for constructing user's logic. The IOBs provide the interface between the package pins and internal signal lines. The programmable interconnect resources provide routing paths to connect the inputs and outputs of the CLBs and IOBs onto the appropriate networks. Customized configuration is established by programming internal static memory cells that determine the logic functions and internal connections implemented in the FPGA.

The following steps are involved in the designing of FPGAs:

1. Design Entry
2. Design Implementation – Mapping
3. Design Verification – Simulation
4. FPGA Configuration – Run

VHDL is a Hardware Descriptive Language used in the Design Entry Stage. For this project, we used the Xilinx Foundation Series software for the Design and Verification of our design.

The Network Interface Controller

The Network Interface Controller is designed to ease interfacing with the Ethernet. The NIC in our project supports the IEEE 802.3 protocol. It has the following features:

• Compatible with IEEE 802.3
• Interface with a microprocessor
• Includes:

• Built in DMA Controller
• Two separate Buffers to store incoming and outgoing Packets
• Retransmission of the frame on collision
• 32bit-Cyclic Redundancy Code generation and checking
• Compatibility with Serial Network Interface.

The NIC implements CSMA/CD access method. Carrier Sense Multiple Access with Collision Detect. Its Functions includes preamble stripping, Source address generation, Destination address Checking, CRC generation and checking short frame detection. Any data rate up to 10Mbps can be used. It automatically manages memory structures for storage of the frames. On chip DMA controller manages two channels transparently to the user. Buffers containing collided frames can be automatically recovered. The NIC can be configured for 8-bit data path. Memory address space is 512k. It provides two independent 1536-byte buffers, one for transmission and the other for reception.

We have designed this NIC using VHDL. We have followed a structural approach in the design. Hence, the chip has been divided into a number of behavioural components.

The components have a hierarchical level as shown below.

fig: Hierarchy of the NIC

Applications / Scope of this project

This project has tremendous applications. These are listed below:

·         As the project is implemented using VHDL, any further modifications to the design or additional features can be incorporated easily by modifying the code and reconfiguring the FPGA.

·         It eliminates the need for a separate computer. Very often print servers require a microcomputer to which the printer is attached. The microcomputer then is called a “Print Server”. Very often, it becomes necessary to dedicate a microcomputer for this job. This is an expensive solution. Our hardware print server eliminates the need for a microcomputer, thus providing an economic way of printing over a network.

·         Event though this Hardware was designed only for a printer, it is possible, through slight modifications, to design such a card for interfacing other peripherals also to the LAN. Thus, it would be possible to connect and share expensive resources such as a scanner, etc. over the LAN.

·        The software may be modified to provide connectivity to these peripherals over the Internet. As the higher order protocol used will be TCP/IP, the protocol used over the Internet, it would be possible to interface the printer to several computers across the globe. Thus geographic separation would no longer be a constraint in sharing documents. It would be possible to send a document from a computer directly to a printer. This configuration would make the existing facsimile obsolete.

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For more details, you may contact me at anandv79@gmail.com.